CSEM Centre Suisse d'Electronique et de Microtechnique SA - Recherche et Développement
Senior IC Layout Engineer (F/M/D) 100%
[Integrated and lightweight photovoltaics]
Facing the challenges of our time
The “Integrated and Wireless Systems” Business Unit
Your mission
You will deliver high-quality IC layout solutions for advanced CMOS projects, with a strong emphasis on innovation and ultra-low-power designs
As part of an experienced layout team, you will lead top-level integration, verification, and documentation through to successful tape-out
You will work closely with Project Managers, IC designers, and PhD students on floor-planning and layout execution, including acceptance for fab integration
This role offers the chance to drive best-in-class IC designs and apply cutting-edge layout techniques and tools
You own top-level integration layout deliverables (GDS, sign-off checks, and documentation) and support block-level work as needed; success is on-time, first-pass-quality tape-out readiness and smooth handoff for fab integration
Main:
Execute IC layout tasks (occasionally block-level; primarily top-level integration) through acceptance for integration and tape-out
Own chip finishing, verification, version control, documentation, and delivery flow
Master layout constraints and floor-planning for advanced CMOS designs